1. Field of the Invention
The present invention relates to circuit devices capable of preventing a brazing material used to fix a semiconductor element from overflowing and relates to a method of manufacturing the circuit device.
2. Description of the Related Art
Conventionally, circuit devices to be set in an electronic apparatus have been required to be reduced in size, in thickness, and in weight, since the circuit devices are used for portable telephones, portable computers and so on. For example, a semiconductor device as a circuit device is typically a package type semiconductor device which is conventionally sealed by normal transfer molding. This semiconductor device is mounted on a printed circuit board PS as shown in FIG. 13.
This package type semiconductor device 61 has a semiconductor chip 62 covered with a resin layer 63, with a lead terminal 64 for external connection derived from the side of this resin layer 63. However, this package type semiconductor device 61 had the lead terminal 64 out of the resin layer 63, and was too large in total size to meet the requirements of small size, low-profile and lightweight. Therefore, various companies have competed to develop a wide variety of structures that are reduced in size, thickness and weight. Recently, a wafer scale CSP which is as large as a chip size, called a CSP (Chip Size Package), or a CSP which is slightly larger than the chip size, has been developed.
FIG. 14 shows a CSP 66 that adopts a glass epoxy substrate 65 as a support substrate and that is slightly larger than the chip size. Herein, a transistor chip T is mounted on the glass epoxy substrate 65.
A first electrode 67, a second electrode 68, and a die pad 69 are formed on the surface of the glass epoxy substrate 65, and a first back electrode 70 and a second back electrode 71 are formed on the back surface thereof. Via a through hole TH, the first electrode 67 and the first back electrode 70, as well as the second electrode 68 and the second back electrode 71, are electrically connected together. The bare transistor chip T is fixed onto the die pad 69. An emitter electrode of the transistor and the first electrode 67 are connected together through a fine metal wire 72, and a base electrode of the transistor and the second electrode 68 are connected together through the fine metal wire 72. Furthermore, a resin layer 73 is provided on the glass epoxy substrate 65 to cover the transistor chip T.
The CSP 66 adopts the glass epoxy substrate 65, which has the merits of a simpler structure extending from the chip T to the back electrodes 70 and 71 for external connection, and a less expensive cost of manufacture than the wafer scale CSP. The CSP 66 is mounted on the printed circuit board PS, as shown in FIG. 13. The printed circuit board PS is provided with the electrodes and wires making up an electric circuit, and has the CSP 66, the package type semiconductor device 61, a chip resistor CR, or a chip capacitor CC fixed for the electrical connection. The circuit on this printed circuit board is packaged in various sets.
However, in the aforementioned semiconductor device, the transistor T is fixed through a reflow process in which a brazing material, such as solder, applied onto the die pad 69 is melted. Therefore, disadvantageously, molten solder overflows from the die pad 69, and the die pad 69 is short-circuited with other electrodes when the transistor T is placed on the molten solder.
Additionally, the die pad 69 is disposed apart from the second electrode 68 in order to prevent the solder that has overflowed from the die pad 69 from reaching the second electrode 68. This has brought about an increase in size of the whole of the device.
The present invention has been made in consideration of these problems. It is therefore a primary object of the present invention to provide circuit devices capable of preventing a brazing material from flowing out from a die pad when a semiconductor element is mounted on the die pad with the brazing material.